1. Field of the Invention
The present invention relates to a method for removing a semiconductor wafer from a flat substrate, in particular from a polishing cloth of a double side polishing machine. The invention also relates to a device for removing a semiconductor wafer from a polishing cloth of a double side polishing machine.
2. The Prior Art
Making a semiconductor wafer planar by means of a chemical/mechanical polishing method forms an important processing step in the process sequence to produce a flat, defect-free and smooth semiconductor wafer. In many production sequences, this polishing step constitutes the last shaping step. Hence this polishing step decisively determines the surface properties, prior to the further use of the semiconductor wafer as starting material for the production of electrical, electronic and microelectronic components. One objective of the polishing method is, in particular, the achievement of a high evenness of the wafer sides (plane parallelity). Other objectives are the removal of surface layers which have been damaged by pretreatments ("damage removal") and the reduction of the microroughness of the semiconductor wafer. The two sides of a semiconductor wafer are distinguished as a rear side and a front side. As a rule, only the front side is used for the attachment of these component structures.
It is usual for single side and double side polishing methods to be used. In the case of single side polishing (SSP), following the mounting of the rear side onto a suitable carrier, only the front side is polished using a polishing cloth stretched onto a polishing plate. During the mounting, a positive and forcible connection is produced between the rear side and the carrier. This connection can be, for example by means of adhesion, bonding, cementing or the application of a vacuum. Single side polishing methods and devices are usual for treating single wafers ("single wafer polishing") or for the treatment of groups of wafers ("batch polishing"). In the case of double side polishing (DSP), the front side and rear side are polished simultaneously. During DSP, a plurality of semiconductor wafers are guided between upper and lower polishing plates covered by polishing cloths. In this case, the semiconductor wafers are located in thin guide cages, which are referred to as wafer carriers. These wafer carriers are also used in a similar form in the lapping of semiconductor wafers. Double side polishing methods and devices are always designed for the treatment of groups of semiconductor wafers ("batch polishing").
The successful production of microelectronic components having a high integration density places extreme requirements on the degree of flatness, freedom from defects and roughness of the semiconductor wafer produced by polishing. These requirements are satisfied in the best way if the semiconductor wafer is polished on both sides. There are advantages for having a polished wafer rear side in addition to having a polished wafer front side. These advantages flow inter alia, from the fact that a semiconductor wafer polished on both sides, by comparison with a semiconductor wafer polished only on one side, has significantly fewer disturbing particles. Other advantages include being simpler to clean, being less susceptible to contamination during its further processing and also being simpler in terms of being able to be measured, characterized and specified metrologically. Furthermore, as a result of the identical treatment of the sides, material stresses resulting from differently structured front and rear sides are avoided.
In principle, a semiconductor wafer that is polished on both sides can be produced by the front side and rear side being polished one after the other using a single side polishing method (sequential SSP). However, the method which is predominantly used in order to achieve polishing of both sides of a semiconductor wafer is double side polishing. The advantages of DSP over sequential SSP reside in the superior degree of achievable evenness of the side surfaces. This evenness is important in particular from the point of view of the plane-parallelity of the front side and the rear side of the wafer. This parallelity is decisive during further processing, and affects the ability to carry out the polishing in a more cost-effective manner. Further advantages of DSP include a higher throughput and the higher yield resulting from dispensing with the mounting, demounting and turning steps necessary in sequential SSP.
Each handling of a freshly polished semiconductor wafer using a mechanically acting handling tool, for example a gripper ("handler"), carries the risk of damaging a polished wafer surface. For example, this damage can result from the fact that impressions or scratches are produced. Such damage is particularly critical when it involves the front side of the semiconductor wafer. Freshly polished semiconductor wafers are also extremely sensitive to uncontrolled chemical attack, for example by an etching agent. The risk of such attack and hence impairment of the evenness of the polished surfaces exists in particular directly after chemical/mechanical polishing. At this point in time, a further chemical action of the polishing agent on the semiconductor wafer is damaging and must be stopped as rapidly as possible. This damage can be stopped, for example, by transferring the semiconductor wafer into a washing, neutralization or cleaning bath.
In the case of single side polishing or sequential SSP, the semiconductor wafer that is mounted on the carrier is removed as rapidly as possible from the polishing device without the mechanical action of a handling tool. The wafer is then immediately transported to a cleaning, washing or neutralization station. This method sequence may be carried out cost-effectively, fully automatically and with high protection of the semiconductor wafer against further chemical action by the polishing agent.
This removal method cannot be used for double side polishing, since the mounting necessary for this of the semiconductor wafer on a carrier does not exist. It is usual to use polishing cloths having different adhesion coefficients, for example polishing cloths made of various materials or having various texturings. This is done in order that all the semiconductor wafers are located on the lower polishing plate following the DSP and following the removal of the upper polishing plate, and are not distributed in a random fashion on the two polishing plates. Wafer removal with the aid of a mechanical handling tool, for example a robot arm that grips the semiconductor wafers one after the other is by vacuum holding of them. This lifts the wafers from the polishing cloth and transfers them into a washing or cleaning bath, but it runs the risk of scratching or breaking up the semiconductor wafer. The semiconductor wafer can only be lifted from the polishing cloth after strong adhesion forces (capillary forces) have been overcome. These forces can be traced back to a film of polishing agent residues, which is enclosed in a gap between the semiconductor wafer and the polishing cloth.
It is therefore usual for each semiconductor wafer to be removed manually from the polishing cloth, which requires special skill and care. The operator of the double side polishing machine has to lift the semiconductor wafer adhering to the polishing cloth carefully, using gloved fingers, by gripping underneath the rounded wafer edge. In the process, the semiconductor wafer must be deliberately subjected to bending, in order that the gap occupied by the polishing agent film is expanded slightly in a wedge shape. This will result in the polishing agent film in the gap shrinking back and slowly releasing the semiconductor wafer. If the design features of the polishing machine permit, it is instead also possible for the semiconductor wafer to be displaced laterally on the polishing cloth beyond the edge of the polishing plate, sliding on the adhesive (capillary) polishing agent film. One disadvantage of these methods of manual wafer removal is the continuing risk of mechanical and chemical damage to the semiconductor wafer. Other disadvantages are the lack of possible automation of the methods and the inability to track individual wafers. The last-mentioned term is understood to mean the increasingly requested requirement to be able at the same time to follow and record the actual manufacturing conditions for each individual semiconductor wafer in detail.